As more electronic circuits are included on a single die, the power dissipated by a single die continues to increase. In order to keep the temperature of a single IC (integrated circuit) at a reasonable temperature, many techniques have been used. For example, elaborate cooling fins have been attached to the substrate of ICs. Also, fans have been positioned near a group of IC's to cool them. In some cases, liquids have been used to transfer the heat produced by ICs. These solutions can be costly and may require a great deal of space, where space is at a premium.
In addition, the cost to air condition rooms where many computers are stored can be costly. Another problem created by ICs consuming more and more power is that in some cases not enough power can be supplied to a computer system through a single-phase power source. In order to supply enough current for this type of computer system, more costly three-phase power is required. If the power used by ICs can be reduced while still achieving higher levels of integration, the cost and area of devices that use ICs may be reduced.
As the size of microprocessors continues to grow, the size of the cache memory that is often included on a microprocessor chip may grow as well. In some applications, cache memory may utilize more than half the physical size of a microprocessor. As cache memory grows so does power consumption.
On-chip cache memory on a microprocessor is usually divided into groups: one group stores data and another group stores instructions. The group that stores data is usually called a data cache (dcache). The group that stores instructions is usually called an instruction cache (icache).
There is a need in the art to reduce the power consumed on microprocessors. An embodiment of this invention specifically addresses power consumption in a microprocessor's instruction cache. In order to provide a sufficient supply of instructions to a modern super-scalar processor, the processor's instruction cache is typically accessed every cycle. For a first level cache access, an access typically requires accessing multiple cache ways along with their tags. The tags are compared to the access address to determine which cache way has the correct information, and then the correct information is forwarded to the execute engine of the microprocessor. The cache ways that did not have the correct information were still accessed, but their instructions were not used. This type of aggressive implementation consumes significant power on a microprocessor.
One embodiment of this invention reduces the power consumed by a multiple-way instruction cache by monitoring when the next icache instruction is guaranteed to be in the same cache line and thus the same cache way as the current access. When the next icache instruction is in the same cache line as the current access, control logic signals all other cache ways to not access their information. By not accessing information from the cache ways that don't contain the required cache line, power is reduced. A detailed description of one embodiment of this invention is described later.